mrfioc2  2.3.0
vxWorks/mrfIoOps.h
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1 #ifndef MRFIOOPS_H
2 #define MRFIOOPS_H
3 
4 /**************************************************************************************************/
5 /* Required Header Files */
6 /**************************************************************************************************/
7 
8 #include <vxWorks.h> /* vxWorks common definitions */
9 #include <vxAtomicLib.h> /* vxWorks atomic operator definitions */
10 #include <sysLib.h> /* vxWorks System Library Definitions */
11 
12 #include <epicsTypes.h> /* EPICS Common Type Definitions */
13 #include <epicsEndian.h> /* EPICS Byte Order Definitions */
14 
15 /**************************************************************************************************/
16 /* Function Prototypes for Routines Not Defined in sysLib.h */
17 /**************************************************************************************************/
18 
19 #ifdef __cplusplus
20 extern "C" {
21 #endif
22 
23 epicsUInt16 sysIn16 (volatile void*); /* Synchronous 16 bit read */
24 epicsUInt32 sysIn32 (volatile void*); /* Synchronous 32 bit read */
25 void sysOut16 (volatile void*, epicsUInt16); /* Synchronous 16 bit write */
26 void sysOut32 (volatile void*, epicsUInt32); /* Synchronous 32 bit write */
27 
28 
29 #ifdef __cplusplus
30 }
31 #endif
32 
33 #define bswap16(value) ((epicsUInt16) ( \
34  (((epicsUInt16)(value) & 0x00ff) << 8) | \
35  (((epicsUInt16)(value) & 0xff00) >> 8)))
36 
37 #define bswap32(value) ( \
38  (((epicsUInt32)(value) & 0x000000ff) << 24) | \
39  (((epicsUInt32)(value) & 0x0000ff00) << 8) | \
40  (((epicsUInt32)(value) & 0x00ff0000) >> 8) | \
41  (((epicsUInt32)(value) & 0xff000000) >> 24))
42 
43 #if EPICS_BYTE_ORDER == EPICS_ENDIAN_BIG
44 # define be16_to_cpu(X) (X)
45 # define be32_to_cpu(X) (X)
46 # define le16_to_cpu(X) bswap16(X)
47 # define le32_to_cpu(X) bswap32(X)
48 
49 #elif EPICS_BYTE_ORDER == EPICS_ENDIAN_LITTLE
50 # define be16_to_cpu(X) bswap16(X)
51 # define be32_to_cpu(X) bswap32(X)
52 # define le16_to_cpu(X) (X)
53 # define le32_to_cpu(X) (X)
54 
55 #else
56 # error Unable to determine native byte order
57 #endif
58 
59 #define ioread8(address) sysInByte ((epicsUInt32)(address))
60 #define iowrite8(address,data) sysOutByte ((epicsUInt32)(address), (epicsUInt8)(data))
61 
62 #define nat_ioread16(address) sysIn16 ((address))
63 #define nat_ioread32(address) sysIn32 ((address))
64 
65 #define nat_iowrite16(address,data) sysOut16(address,data)
66 #define nat_iowrite32(address,data) sysOut32(address,data)
67 
68 #define be_ioread16(address) be16_to_cpu (sysIn16 ((address)))
69 #define be_ioread32(address) be32_to_cpu (sysIn32 ((address)))
70 
71 #define be_iowrite16(address,data) sysOut16 ((address), be16_to_cpu((epicsUInt16)(data)))
72 #define be_iowrite32(address,data) sysOut32 ((address), be32_to_cpu((epicsUInt32)(data)))
73 
74 #define le_ioread16(address) le16_to_cpu (sysIn16 ((address)))
75 #define le_ioread32(address) le32_to_cpu (sysIn32 ((address)))
76 
77 #define le_iowrite16(address,data) sysOut16 ((address), le16_to_cpu((epicsUInt16)(data)))
78 #define le_iowrite32(address,data) sysOut32 ((address), le32_to_cpu((epicsUInt32)(data)))
79 
80 #define rbarr() VX_MEM_BARRIER_R()
81 #define wbarr() VX_MEM_BARRIER_W()
82 #define rwbarr() VX_MEM_BARRIER_RW()
83 
84 #endif /* MRFIOOPS_H */
void sysOut32(volatile void *, epicsUInt32)
epicsUInt32 sysIn32(volatile void *)
epicsUInt16 sysIn16(volatile void *)
void sysOut16(volatile void *, epicsUInt16)