mrfioc2  2.3.0
plx9030.h
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1 /*************************************************************************\
2 * Copyright (c) 2010 Brookhaven Science Associates, as Operator of
3 * Brookhaven National Laboratory.
4 * mrfioc2 is distributed subject to a Software License Agreement found
5 * in file LICENSE that is included with this distribution.
6 \*************************************************************************/
7 /*
8  * Author: Michael Davidsaver <mdavidsaver@gmail.com>
9  */
10 
11 #ifndef PLX9030_H
12 #define PLX9030_H
13 
14 /*
15  * A selection of registers for the PLX PCI9030
16  *
17  * This device is exposed as BAR #0 on PCI and PMC
18  * versions of the EVR
19  */
20 
21 /* Address space #0 is exposed as BAR #2 */
22 #define U32_LAS0BRD 0x28
23 /* Set for big endian, clear for little endian (swapped) */
24 # define LAS0BRD_ENDIAN 0x01000000
25 
26 /* Interrupt control */
27 #define U16_INTCSR 0x4c
28 # define INTCSR_INT1_Enable 0x01
29 # define INTCSR_INT1_Polarity 0x02
30 # define INTCSR_INT1_Status 0x04
31 # define INTCSR_INT2_Enable 0x08
32 # define INTCSR_INT2_Polarity 0x10
33 # define INTCSR_INT2_Status 0x20
34 # define INTCSR_PCI_Enable 0x40
35 # define INTCSR_SW_INTR 0x80
36 
37 #define PCI_VENDOR_ID_PLX 0x10b5 /* PCI Vendor ID for PLX Technology, Inc. */
38 
39 #endif /* PLX9030_H */