SeqHW Struct Reference

Collaboration diagram for SeqHW:

Public Member Functions
	SeqHW (SeqManager *o, unsigned i, volatile void *ctrl, volatile void *ram)
void	arm ()
bool	disarm ()

Public Attributes
SeqManager *const	owner
const unsigned	idx
volatile void *const	ctrlreg
volatile void *const *const	rambase
SoftSequence *	loaded
	current association. may be NULL More...
bool	running
	between SoS and EoS More...
epicsUInt32	ctrlreg_user
	user requested (based on commited sequence) More...
epicsUInt32	ctrlreg_hw
	current in HW. either same as _user or trigger disabled More...

Detailed Description

Definition at line 56 of file mrmSeq.cpp.

Constructor & Destructor Documentation

SeqHW()

SeqHW::SeqHW ( SeqManager *  o, unsigned  i, volatile void *  ctrl, volatile void *  ram  )

inline

Definition at line 73 of file mrmSeq.cpp.

        :owner(o)
        ,idx(i)
        ,ctrlreg(ctrl)
        ,rambase(ram)
        ,loaded(0)
        ,running(false)
        ,ctrlreg_user(0u)
        ,ctrlreg_hw(0u)
    {
        switch(owner->type) {
        case SeqManager::TypeEVG:
            ctrlreg_user |= 31;
            break;
        case SeqManager::TypeEVR:
            ctrlreg_user |= 63;
            break;
        default:
            return;
        }
        ctrlreg_hw = ctrlreg_user;

        nat_iowrite32(ctrlreg, ctrlreg_hw | EVG_SEQ_RAM_RESET);
    }

Member Function Documentation

arm()

void SeqHW::arm ( )

inline

Definition at line 102 of file mrmSeq.cpp.

    {
        ctrlreg_hw = ctrlreg_user;
        nat_iowrite32(ctrlreg, ctrlreg_hw | EVG_SEQ_RAM_ARM);
    }

disarm()

bool SeqHW::disarm ( )

inline

Definition at line 109 of file mrmSeq.cpp.

    {

        // EVG_SEQ_RAM_DISABLE is really "stop"
        // to avoid aborting a potentially running sequencer, switch the trigger source to disable

        ctrlreg_hw &= ~(EVG_SEQ_RAM_SRC_MASK);

        switch(owner->type) {
        case SeqManager::TypeEVG:
            ctrlreg_hw |= 31;
            break;
        case SeqManager::TypeEVR:
            ctrlreg_hw |= 63;
            break;
        }

        nat_iowrite32(ctrlreg, ctrlreg_hw);
        bool isrun = nat_ioread32(ctrlreg) & EVG_SEQ_RAM_RUNNING;

        return isrun;
    }

Member Data Documentation

ctrlreg

volatile void* const SeqHW::ctrlreg

Definition at line 60 of file mrmSeq.cpp.

ctrlreg_hw

epicsUInt32 SeqHW::ctrlreg_hw

current in HW. either same as _user or trigger disabled

Definition at line 70 of file mrmSeq.cpp.

ctrlreg_user

epicsUInt32 SeqHW::ctrlreg_user

user requested (based on commited sequence)

Definition at line 70 of file mrmSeq.cpp.

idx

const unsigned SeqHW::idx

Definition at line 59 of file mrmSeq.cpp.

loaded

SoftSequence* SeqHW::loaded

current association. may be NULL

Definition at line 66 of file mrmSeq.cpp.

owner

SeqManager* const SeqHW::owner

Definition at line 58 of file mrmSeq.cpp.

rambase

volatile void* const * const SeqHW::rambase

Definition at line 60 of file mrmSeq.cpp.

running

bool SeqHW::running

between SoS and EoS

Definition at line 68 of file mrmSeq.cpp.

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The documentation for this struct was generated from the following file:

• mrmSeq.cpp